Sandisk and SK hynix Publish First HBF Specification

HBF uses vertically stacked NAND flash rather than DRAM. SK hynix describes it as a memory layer between HBM and SSDs, intended to combine substantially more capacity than HBM with bandwidth closer to the compute complex than conventional storage. The target use case is AI inference, where model weights and other data can exceed the HBM capacity attached to GPUs or other accelerators.

SDxCentral reports that the specification defines two stack configurations with capacity up to 512 GB, and three bandwidth grades ranging from 0.4 Tb/s to 3 Tb/s. It also reports that the interface uses Universal Chiplet Interconnect Express (UCIe) to connect HBF with processors including CPUs and GPUs. Those capacity and bandwidth figures describe the standard's outlined configurations, not broadly available HBF products.

Sandisk CTO Alper Ilkbahar said in the company's announcement: "AI inference is creating a new set of memory requirements, and HBF technology is designed to meet that moment." He added that the specification gives system designers a path to bring high-capacity, high-bandwidth memory closer to compute and could support architectures intended to improve token economics at scale.

The published material does not frame HBF as a universal replacement for HBM. VideoCardz, citing the specification and prior Sandisk material, reports that HBM and HBF can coexist in a system: HBM can serve lower-latency data while HBF supplies additional capacity for model weights and other inference data.

That distinction matters technically. NAND-based media has different latency, endurance, and access characteristics from DRAM-based HBM, while AI-serving systems increasingly need a larger memory hierarchy than accelerator-attached HBM alone can economically provide. In comparable infrastructure designs, a standardized interface can reduce integration friction across memory vendors, accelerator makers, and server builders, but application-level performance still depends on data placement, caching policy, software support, and workload access patterns.

SK hynix executive vice president Kim Chun-sung said at FMS 2026 that SK hynix would expand the boundaries between memory and storage through HBF and contribute to architectures that improve overall system efficiency. The consortium began its OCP work roughly six months before the specification release, according to Sandisk and SK hynix.

Commercial availability remains an open question. VideoCardz reports that Sandisk had previously targeted the second half of 2026 for initial HBF samples and early 2027 for initial AI inference-device sampling, while noting that the latest announcement did not provide an updated product schedule. The immediate outcome is an open technical baseline that hardware and system designers can evaluate before volume HBF deployments arrive.