SEALSQ Integrates Post-Quantum Security With Lattice FPGAs
On February 18, SEALSQ Corp. (NASDAQ:LAES) announced a collaboration with Lattice Semiconductor to integrate Trusted Platform Module (TPM)-based post-quantum cryptography into select Lattice FPGA platforms via a proof-of-concept. The PoC combines SEALSQ's QS7001 and QVault TPM root-of-trust with Lattice’s power-efficient FPGAs to demonstrate embedded quantum-resistant hardware for mission-critical edge computing. The partnership positions both firms to address NIST-recommended post-quantum security requirements.
Key Points
- 1Announces PoC integrating QS7001 and QVault TPM with Lattice FPGAs for post-quantum cryptography.
- 2Addresses industry need for quantum-resistant hardware in mission-critical edge computing and high-stakes environments.
- 3Enables a reference design for embedding post-quantum cryptography into programmable hardware and vendor solutions.
Scoring Rationale
Official PoC announcement with practical hardware implications; limited novelty, promotional tone, and modest industry impact.
Sources
Public references used for this report.
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