Industry Newsadvanced packagingcowostsmcnvidia
NVIDIA Secures Majority Of TSMC CoWoS Capacity
9.0
DigiTimes reports NVIDIA has booked 800,000–850,000 CoWoS wafers for 2026, representing more than half of TSMC's capacity. The allocation targets NVIDIA's Blackwell Ultra ramp and future Rubin architecture while TSMC expands packaging sites including Chiayi AP7 and planned Arizona plants. Despite capacity growth, TSMC expects supply constraints to persist until US mass production begins around 2028.
Key Points
- 1Books 800,000–850,000 wafers for 2026 CoWoS, claiming more than half of capacity
- 2Concentrates CoWoS capacity at NVIDIA, increasing constraints for competitors and industry packaging supply
- 3Drives TSMC to expand facilities (Chiayi AP7, Arizona) but supply remains tight until 2028 mass production
Scoring Rationale
Strong industry impact due to NVIDIA's large CoWoS bookings; limited by single-source reporting and unconfirmed order details.
Sources
Public references used for this report.
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