NVIDIA Cuts GPU Cell Porting Time With AI

NVIDIA is deploying AI across its internal chip design flow and reporting step-change productivity and quality gains. Chief Scientist Bill Dally described a reinforcement learning program called NB-Cell that has reduced a standard-cell library porting task from 80 person-months to running overnight on a single GPU for 2,500 to 3,000 cells, with the resulting cells matching or exceeding human designs on size, power, and delay. Dally said, "So, we're trying to use AI wherever we can in our design process... Then we developed a program based on reinforcement learning called NB-Cell... and it's overnight on one GPU."

NVIDIA applies AI at multiple points in its flow, including:

• •design exploration
• •standard cell library porting and optimization
• •bug handling and verification
• •targeted layout placement problems (via prefix RL)

NB-Cell is reinforcement learning-based and iterates cell layout and sizing to optimize area, power dissipation, and timing. prefix RL tackles specific micro-architectural placement tasks, producing layouts "no human would ever come up with" while improving metrics by roughly 20 to 30% versus human designs. NVIDIA also runs internal LLMs, Chip Nemo and Bug Nemo, fine-tuned on decades of proprietary RTL, architecture docs, and bug histories to assist verification and debugging workflows. Dally explicitly noted that fully end-to-end automated chip design is still far off, so these tools serve as powerful accelerants to human engineers rather than replacements.

This is a concrete, production-scale example of ML accelerating a traditionally slow, expert-driven hardware engineering process. The combination of RL for layout/search and LLMs for document-and-bug-context represents a pragmatic, hybrid approach: ML automates repetitive or search-heavy tasks and uncovers unconventional solutions, while engineers retain oversight. The gains remove a key friction point for moving to new process nodes and could shorten product cycles for GPU and accelerator families. For the broader industry, this validates investment in ML-native EDA tooling and may pressure EDA vendors and chipmakers to adopt similar RL+LLM toolchains.

Monitor whether NVIDIA publishes more benchmarks, opens tool APIs, or partners with EDA vendors, and watch for similar RL-driven features from established EDA providers or chipmakers adopting internal LLMs.