Google Targets 12 Million to 15 Million TPU v9 Chips by 2028

Tom's Hardware quoted the Fubon note as stating that Google would enter the V9 TPU generation in 2028 with four compute dies per processor. The note projected that this design would more than double the associated capacity consumption versus 2027.

Multi-die accelerators require advanced packaging and interconnect technologies to connect compute dies within a package. In industry-wide terms, unit shipment comparisons alone do not establish performance parity: architecture, memory bandwidth, interconnect, precision formats, software support, and workload mix all affect usable AI training and inference capacity.

TechSpot reported that Fubon viewed manufacturing capacity as a possible constraint and raised Intel Foundry as a potential supplementary supplier. That account also noted that package designs based on Intel's EMIB technologies are not directly compatible with TSMC's CoWoS-L packaging approach.

Reuters reported on June 8 that Alphabet had placed an order with Intel to manufacture more than three million TPUs in 2028, citing The Information and people with direct knowledge of discussions. Reuters said it could not independently verify the report; Intel declined to comment, while Alphabet and Nvidia did not immediately respond to Reuters requests for comment.

That reported order is smaller than Fubon's 12 million to 15 million estimate, and the available reports do not establish how the volume would be allocated between Intel and other manufacturing partners. The sources also do not provide technical specifications, pricing, yields, or performance benchmarks for TPU v9.

For ML infrastructure teams, the reported figures matter because custom silicon volume can influence the availability and economics of cloud accelerator capacity. More broadly, analysts have identified a sector-wide push to diversify advanced-packaging and foundry supply, particularly where demand has been concentrated at TSMC. Reuters quoted eMarketer analyst Jacob Bourne describing the reported Intel discussions as evidence that major AI players are seeking to diversify a supply chain still heavily concentrated in TSMC.

Nvidia's projected shipment volume remains a different measure from Google's reported TPU target. Nvidia supplies a broad ecosystem of cloud providers, enterprises, and system vendors, whereas Google's TPU fleet primarily supports Google infrastructure and Google Cloud offerings. The reported comparison is consequently most useful as an indicator of hyperscaler-scale accelerator procurement, rather than a direct comparison of the two companies' AI hardware businesses.