Alphabet Orders Over Three Million TPUs From Intel

Reuters reported June 8, citing The Information and people with direct knowledge of the discussions, that Alphabet's Google placed an order with Intel to manufacture more than three million tensor processing units (TPUs) for 2028. Reuters also reported that Nvidia is evaluating whether Intel could make a processor combining multiple graphics chips, but that Nvidia had not placed a similar order as of the report. Intel's shares rose more than 9% in early trading after the story broke. Yahoo Finance reported on June 13 that TD Cowen analyst John Blackledge raised his price target on Alphabet following the coverage, and that D.A. Davidson analyst Gil Luria commented on policy support for U.S.-based manufacturing.

The claim has drawn direct pushback from Wall Street analysts. JPMorgan described the report as a "storm in a teacup" and said the TPUs in question "are still being fabbed at TSMC," using TSMC's 2-nanometer process for the compute die and 3-nanometer process for the input-output die, with Intel's role limited to its EMIB-T advanced packaging rather than core chip fabrication, according to Wccftech's coverage of the analyst notes. Citi's Taiwan semiconductor analyst offered a partial rebuttal, saying the report could cover Intel's foundry and design services alongside packaging. Neither Google, Intel, nor Nvidia has issued an official statement confirming order size or contract structure. Reporting frames the underlying dynamic, hyperscalers diversifying foundry supply amid TSMC capacity constraints, as real regardless of how this specific claim resolves.

TPUs are Google's custom AI accelerators for large-scale model training and inference, and demand for them scales with data-center AI workloads. This episode is a useful reminder that supply-chain diversification claims should be read carefully: packaging capacity and wafer fabrication capacity are different constraints with different lead times and risk profiles, and headlines about a hyperscaler foundry order do not always distinguish between them. Procurement and infrastructure teams should watch both wafer allocation and advanced-packaging throughput, and treat single-sourced reports of this kind as directional rather than confirmed until the companies involved speak on the record.

• •An official statement from Alphabet, Intel, or Nvidia that would convert reporting into a confirmed contract and clarify whether Intel's role is fabrication, packaging, or both.
• •Intel's foundry ramp timeline and facility allocations, which will determine whether volume and scheduling targets are feasible if the deal is confirmed as described.
• •Any follow-on orders from Nvidia or other hyperscalers, and whether those are limited to advanced packaging or include full-node logic production.
• •Public comments from TSMC about capacity and customer allocation in light of the dispute over where the TPUs are actually fabricated.