Samsung Adds In-Memory Logic to LPDDR5X
Samsung presented LPDDR5X-PIM at Hot Chips 2026, adding processing-in-memory logic to low-power DRAM for AI inference. In preliminary tests reported from the presentation, the company showed a 2.28x model-runtime improvement and a 3.01x increase in tokens per second for Llama 3.1 8B, alongside an eightfold claimed bandwidth increase. The figures are workload-specific rather than a general system-performance result.
Samsung presented its LPDDR5X-PIM design at Hot Chips 2026, bringing processing-in-memory logic to low-power LPDDR5X DRAM. The Hot Chips program lists the session as Samsung's LPDDR5X-based PIM solution for AI inference, while reporting from the presentation describes logic placed alongside memory banks so selected multiply-accumulate work can occur closer to stored data.
What Samsung reported
The presentation's two performance figures measure different things. Tom's Hardware reported a 2.28x improvement in model run time with PIM and a 3.01x increase in tokens per second. Those numbers should not be treated as conflicting claims or as one universal inference multiplier: they reflect separate preliminary measurements.
The same report described a test using Llama 3.1 8B on an edge AI accelerator. Samsung also reported that LPDDR5X-9600's 76.8 GB/s peak bandwidth could rise to 614 GB/s with PIM, an eightfold figure tied to reducing data movement for work performed in memory.
Why the detail matters
Processing in memory can help when repeated data transfers between compute and DRAM limit throughput. The reported design uses conventional single-bank operation as well as a multi-bank PIM mode, so the potential benefit depends on which operations can run in memory and how the host coordinates them.
The evidence currently supports a preliminary, workload-specific result, not a directly reproducible comparison across AI systems. The retrieved reporting does not provide a complete public test configuration for the accelerator, precision, latency, energy use, or output-quality comparison. Those details will matter before engineers can judge whether the approach improves an end-to-end workload rather than one selected benchmark.
For practitioners, the announcement is most useful as a memory-architecture signal
low-power DRAM is being explored as a place to reduce data movement for inference. It does not yet establish product availability, software compatibility, or a broadly applicable performance gain.
Key Points
- 1Samsung presented LPDDR5X-PIM, a low-power DRAM design with processing-in-memory logic, at Hot Chips 2026.
- 2Reported preliminary results distinguish a 2.28x model-runtime improvement from a 3.01x tokens-per-second increase for Llama 3.1 8B.
- 3The eightfold bandwidth claim and performance results are workload-specific; public evidence does not yet supply a complete reproducible system configuration.
Scoring Rationale
LPDDR5X-PIM is a notable memory-architecture development for inference systems constrained by data movement and power. Samsung's preliminary results are meaningful for practitioners evaluating edge and memory-bound workloads, but missing reproducibility details and unclear availability limit immediate applicability.
Sources
Primary source and supporting public references used for this report.
Practice interview problems based on real data
1,625 SQL & Python problems across 15 industry datasets — the exact type of data you work with.
Try 250 free problems
