India Expands Academic Semiconductor Design Ecosystem
India’s Chips to Start-up (C2S) programme has yielded measurable academic outputs since its 2022 launch, with 46 institutions submitting 122 chip designs across six shared wafer runs coordinated by ChipIN at C-DAC Bengaluru and SCL Mohali. Fifty-six student chips have been fabricated and delivered, while the programme reports 175 lakh hours of EDA usage, over 75 patents, and aims to train 85,000 professionals under a Rs 250 crore five-year outlay.
Key Points
- 1Report 46 institutions submitted 122 designs across six shared wafer runs, producing 56 fabricated student chips.
- 2Leverages shared-wafer 180nm process and ChipIN aggregation to lower costs and scale academic participation.
- 3Enables hands-on silicon validation, patents, IP cores, and training toward 85,000 industry-ready professionals.
Scoring Rationale
Official programme metrics show tangible national progress; limited novelty and primarily national scope constrain broader global impact.
Sources
Public references used for this report.
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