ideaForge partners with DMP to develop AI drones

ideaForge Technology Ltd signed a memorandum of understanding with Japan-based Digital Media Professionals Inc. (DMP) to co-develop next-generation AI-powered unmanned aerial vehicles, according to Electronics For You and IndianWeb2. The agreement assigns ideaForge to integrate DMP's Di1 edge AI system-on-chip into its vertical take-off and landing (VTOL) UAV platforms, while DMP will act as a go-to-market partner in Japan for demonstrations, distribution, customer engagement, training, and after-sales services (Electronics For You; IndianWeb2). The companies framed the collaboration as targeting defence, security, and industrial use cases (Electronics For You).

Per reporting, DMP's Di1 SoC includes an FP4-based neural processing unit and multi-camera support intended to enable real-time processing and 360-degree vision on edge devices (Electronics For You; IndianWeb2). The announcements describe combining those on-board perception capabilities with ideaForge's field-proven VTOL platforms to support autonomy in complex environments (IndianWeb2; Electronics For You).

Edge-AI SoCs with dedicated NPUs and multi-camera pipelines are increasingly used to move perception and decision loops on device rather than in the cloud. Companies integrating such chips into UAVs typically aim to reduce latency, improve resilience to connectivity loss, and enable continuous multi-camera situational awareness. For practitioners, this raises engineering tradeoffs around thermal management, power budget, sensor fusion pipelines, and real-time scheduling on constrained embedded hardware.

Industry reporting cites a large addressable market backdrop: IndianWeb2 quotes projections that the global drone market could grow from USD 54.9 billion in 2024 to USD 117.6 billion by 2030, and that Japan's market may expand from USD 2.0 billion in 2025 to USD 5.1 billion by 2034 (IndianWeb2). Editorial analysis: Partnerships that pair a drone OEM with an edge-AI silicon vendor are a common route to accelerate product readiness for regulated and latency-sensitive verticals such as defence and infrastructure inspection. For ML engineers and embedded systems teams, these collaborations tend to surface integration workstreams around model quantization, on-chip runtime selection, camera synchronization, and certification-friendly telemetry.

• •Watch for technical release notes or reference designs showing which perception models are targeted for Di1 on ideaForge platforms and the quantization/acceleration stack used (vendor runtimes, compilers, driver stacks).
• •Track demonstrations and field trials in Japan, which the companies specified as a commercialization focus, for evidence of real-world robustness across contested RF and weather conditions (Electronics For You; IndianWeb2).
• •Monitor software tooling and SDK availability from DMP for broader third-party model portability; wider tooling adoption would affect how quickly other UAV integrators can leverage Di1.

Ankit Mehta, CEO and Co-Founder of ideaForge, said, "This collaboration with DMP aligns perfectly with our broader strategy to develop high-performance, customizable AI for defence autonomy drones that efficiently address diverse global market needs" (Electronics For You). Tatsuo Yamamoto, Chairman, President and CEO of DMP, said, "We will work together to create Physical AI-powered solutions that change the way drones operate in terms of safety, accuracy, and independence" (Electronics For You).

All high-level technical and commercial claims in this piece come from the companies' announcements and trade reporting (Electronics For You; IndianWeb2; PTI summarized reporting). The coverage does not include independent benchmark data for Di1 performance on real-world UAV workloads or contract details such as exclusivity, timelines, or volume targets. ideaForge and DMP have not published comparative latency, power-per-inference, or specific flight-test results in the cited reports.

Editorial analysis: Embedded ML and avionics teams in comparable programs should expect integration work across model optimization, thermal and power budgets, sensor fusion latency, and safety-case documentation. Observers building edge perception stacks will want to compare Di1's NPU characteristics, supported runtimes, and camera I/O against alternatives when assessing platform-level tradeoffs.